Crystal oscillator

ABSTRACT

A crystal oscillator is configured by accommodating a crystal blank that functions as a crystal unit and an IC chip that includes at least an oscillator circuit using the crystal blank into a container in an integrated manner. In the IC chip, the oscillator circuit is connected to the crystal unit via a pair of crystal connecting terminals, an output from the oscillator circuit is supplied to a plurality of output buffers. In relation to the crystal connecting terminal having a phase opposite to that of an output from the on/off controllable output buffer, an output terminal of this output buffer is disposed farther than an output terminal of the output buffer that is not subjected to the on/off control.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of U.S. application Ser. No.13/341,213, filed on Dec. 20, 2011, now granted, which claims priorityto Japanese Patent Application No. 2011-001335, filed Jan. 6, 2011, andto Japanese Patent Application No. 2011-113716, filed May 20, 2011 whichare hereby incorporated by reference in their entirety.

BACKGROUND OF THE INVENTION

1. Field of the Invention:

The present invention relates to a quartz crystal oscillator thatincludes a quartz crystal unit and an IC (integrated circuit) chipintegrating an oscillator circuit using the crystal unit in onecomponent, and more specifically, to a crystal oscillator with improvedstability of oscillation frequency.

2. Description of the Related Arts:

The crystal oscillator configured by combining the crystal unit and theIC chip integrating the oscillator circuit using the crystal unit into asingle package component can easily adopt a surface mount configuration,and is widely incorporated as a reference source of frequency and timein a mobile electronic device, for instance, typified by a mobile phone.

In the crystal oscillator, the electronic circuit integrated in the ICchip is not limited to an oscillator circuit. Instead, for instance, anelectronic circuit, such as a temperature compensating circuit, can beintegrated into the IC chip. The temperature compensating circuitcompensates temperature-frequency characteristics of the crystal unitand allows a constant oscillation frequency to be acquired irrespectiveof the ambient temperature. A crystal oscillator capable of highlyaccurately maintaining the oscillation frequency by integrating atemperature compensating circuit in the IC chip is referred to as atemperature compensated crystal oscillator (TCXO).

FIG. 1 shows an example of a circuit configuration of a TCXO.

The TCXO shown in the diagram includes: crystal unit 10; and IC chip 20including an oscillator circuit using crystal unit 10. For instance, acrystal unit employing an AT-cut quartz crystal blank can be adopted ascrystal unit 10. IC chip 20 includes: constant voltage circuit 21 thatis supplied with a power supply voltage from the outside and in turnsupplies a regulated internal power supply voltage to each circuit in ICchip 20; oscillator circuit 22 connected with crystal unit 10; frequencycontroller 23 that is supplied with an automatic frequency control (AFC)signal from the outside, generates a frequency control signal andsupplies this signal to oscillator circuit 22; temperature sensor 24that measures temperature; temperature compensating circuit 25 thatgenerates a temperature compensating signal for compensatingtemperature-frequency characteristics of crystal unit 10 according tothe measurement result of temperature by temperature sensor 24, andsupplies this signal to oscillator circuit 22; nonvolatile memory 26that stores data used for generating the temperature compensatingsignal; and output buffers 27 and 28 that amplify an oscillation outputfrom oscillator circuit 22 and supply the output as an analog signal toexternal circuits. Output buffers 27 and 28 are arranged in parallel.Output buffer 28 thereof is capable of turning on and off according toan enable signal supplied from the outside. In consideration of a caseof incorporating the TCXO into an electronic device having a wirelesscommunication function, a continuous oscillation output signal fromoutput buffer 27 is adopted as a reference signal for a PLL(phase-locked loop) synthesizer circuit in a wireless section, andfurther adopted as clocks for a DSP (digital signal processor) and aCPU(central processing unit) for system control. On the other hand,output buffer 28 is linked to an intermittent operation signal for thePLL circuit and allows on/off control of the output. An oscillationoutput signal from output buffer 28 is supplied to, for instance,circuits without need to operate during standby. By thus allowing theon/off control of the output from output buffer 28, power consumption ofthe electronic device with the crystal oscillator during standby isfacilitated to be reduced.

Along with the above arrangement of circuits in IC chip 20, IC chip 20includes: power supply terminal VDD to which power supply voltage issupplied; ground terminal GND; pair of crystal connecting terminals X1and X2 electrically connected with crystal unit 10; input terminal AFCto which an automatic frequency control signal is supplied; enableterminal EN to which an enable signal is supplied; and two outputterminals OUT1 and OUT2 at which oscillation output signals fromrespective output buffers 27 and 28 appear. A Colpitts oscillatorcircuit including an inverting amplifier is widely used as oscillatorcircuit 22. Crystal connecting terminal X1 is electrically drawn from aninput side of the amplifier, and crystal connecting terminal X2 iselectrically drawn from an output side of the amplifier. Accordingly,along with an operation of oscillator circuit 22, the phases of signalcomponents of oscillation frequencies appearing at respective crystalconnecting terminals X1 and X2 are opposite to each other as shown inFIG. 1. Both inverting and non-inverting amplifiers are usable as outputbuffers 27 and 28. However, as shown in FIG. 1, in a case wherenon-inverting amplifiers are employed as output buffers 27 and 28,signal phases at output terminals OUT1 and OUT2 are identical to thesignal phase at crystal connecting terminal X2.

In a case of providing two output buffers in the crystal oscillator, onemay be configured by an inverting amplifier and the other may beconfigured by a non-inverting amplifier. JP2005-026828A describes acrystal oscillator that employs inverting and non-inverting amplifiersas output buffers and allows simultaneous on/off control of outputs fromthe two output buffers. A configuration for acquiring two oscillationoutput signals that have the identical frequency but have phasesopposite to each other is described in, for instance, US 2006/0176121A1. In the crystal oscillator described in US 2006/0176121 A1, first andsecond amplifiers, both of which are inverting amplifiers, are employed,a crystal unit is inserted between an input terminal of the firstamplifier and an input terminal of the second amplifier, a loadcapacitor is inserted between the input or output terminal of eachamplifier and a ground point, the output terminal of the first amplifierand the input terminal of the second amplifier are connected to eachother via a first dc blocking capacitor, the input terminal of the firstamplifier and the output terminal of the second amplifier are connectedto each other via a second dc blocking capacitor, and a feedbackresistor is provided for each amplifier, allowing oscillation outputsignals having phases opposite to each other from the respective firstand second amplifiers to be acquired.

Incidentally, what is configured by hermetically encapsulating a quartzcrystal blank in a container is a crystal unit. Accordingly, the crystaloscillator is configured as a package component by integrating acontainer and an IC chip; this integration is made by means of fixingthe IC chip to the container of the crystal unit, hermeticallyencapsulating the crystal blank and the IC chip in the same container,or using a container including two housing portions to hermeticallyhouse the crystal blank at one portion and house the IC chip at theother portion for integration. Also in this case, electronic circuitssuch as an oscillator circuit using a crystal blank are integrated inthe IC chip. The crystal blank is represented as crystal unit 10 in acircuit diagram representation as shown in FIG. 1.

SUMMARY OF THE INVENTION

Miniaturization of crystal oscillators has presently been advanced. Whathas outer dimensions of a package of 2 mm in length, 1.6 mm in width and0.8 mm in height (i.e., thickness) has been put to practical use. In theminiaturized crystal oscillators there are concerns on adverse effectsof an oscillation output signal acquired from an output buffer beingleaked back to an oscillator circuit side. In particular, in a casewhere variation in load and on-and-off of an output from the outputbuffer itself varies the amplitude of an oscillation output signal on anoutput side of the output buffer, a leak amount of a signal componentback to the oscillator circuit side varies accordingly. This variationmay in turn cause variation in oscillation frequency. If the leak amountis continuously constant, circuit design in consideration of the leakamount allows a stable and highly accurate oscillation frequency to beacquired. However, in a case where variation in signal amplitude at theoutput side of the output buffer varies the amount of leak of theoscillation frequency component back to the oscillator circuit side,design allowing the variation is practically difficult. Accordingly, thevariation in oscillation frequency cannot be ignored.

It is an object of the present invention to provide a crystal oscillatorthat includes a plurality of output buffer circuits, allows on/offcontrol of an output from at least one output buffer circuit, and has asmall variation in oscillation frequency in a case of performing on/offcontrol of the output.

According to a first aspect of the present invention, a crystaloscillator is provided that includes: a crystal unit; and an IC chip inwhich at least an oscillator circuit using the crystal unit isintegrated, the crystal unit and the oscillator circuit being housed ina container, wherein the IC chip includes: a plurality of output buffersthat amplify an output from the oscillator circuit and output theamplified output to the outside; a pair of crystal connecting terminalsthat are used for electrical connection between the oscillator circuitand the crystal unit; and output terminals provided for the respectiveoutput buffers, signals of an oscillation frequency component appear atthe pair of crystal connecting terminals with phases opposite to eachother, each of the plurality of output buffers independently includes aninverting or non-inverting amplifier, at least one of the plurality ofoutput buffers is an output buffer whose output is on/off controllableaccording to an enable signal, and the IC chip is configured such that,for each on/off controllable output buffer, in relation to the crystalconnecting terminal having a phase opposite to that of the output ofthis output buffer, an output terminal of this output buffer is disposedfarther than an output terminal of the other output buffer.

According to a second aspect of the present invention, a crystaloscillator is provided that includes: a crystal unit; and an IC chip inwhich at least an oscillator circuit using the crystal unit isintegrated, the crystal unit and the oscillator circuit being housed ina container, wherein the IC chip includes: a plurality of output buffersthat amplify an output from the oscillator circuit and output theamplified output to the outside; a pair of crystal connecting terminalsthat are used for electrical connection between the oscillator circuitand the crystal unit; and output terminals provided for the respectiveoutput buffers, signals of an oscillation frequency component appear atthe pair of crystal connecting terminals with phases opposite to eachother, each of the plurality of output buffers independently includes aninverting or non-inverting amplifier, at least one of the plurality ofoutput buffers is an output buffer whose output is on/off controllableaccording to an enable signal, and the container is configured suchthat, for each on/off controllable output buffer, wiring is made suchthat a capacitance between the crystal connecting terminal having aphase opposite to that of the output of this output buffer and an outputterminal of this output buffer is smaller than a capacitance betweenthis output terminal and the other crystal connecting terminal.

The crystal oscillator according to the present invention adopts any ofthe aforementioned configurations. Then, leaking of the oscillationfrequency component back to the oscillator circuit side is reduced,allowing variation in oscillation frequency along with on/off control ofthe output buffer to be suppressed.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram showing an example of a circuit configurationof a temperature compensated crystal oscillator (TCXO) of a related art;

FIG. 2 is a block diagram showing a circuit configuration of a crystaloscillator according to an embodiment of the present invention;

FIG. 3 is a circuit diagram illustrating a principle of suppressingvariation in oscillation frequency;

FIG. 4 is a sectional view showing an example of a structure of thecrystal oscillator;

FIG. 5 is a bottom view of the crystal oscillator shown in FIG. 4 in astate where an IC chip is removed;

FIG. 6 is a block diagram showing a circuit configuration of a crystaloscillator according to another embodiment of the present invention; and

FIG. 7 is a block diagram showing a circuit configuration of a crystaloscillator according to a further embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

In the figures with which description will be made below, parts andelements identical to those in FIG. 1 are assigned with identicalreference numerals, and description thereof is simplified or omitted.

A quartz crystal oscillator according to an embodiment of the presentinvention shown in FIG. 2 is configured as a TCXO, as with that shown inFIG. 1. This oscillator is configured by integrating crystal unit 10 andIC chip 20 into a package component. For instance, a crystal unit usingan AT-cut quartz crystal blank is employed as crystal unit 10. Variousconfigurations can be used for integrating crystal unit 10 and IC chip20. These configurations may be: a configuration in which a packageincluding an IC chip is attached to a crystal unit which is configuredby encapsulating a crystal blank in a container body; a configurationhermetically encapsulating a crystal blank, which functions as a crystalblank, together with an IC chip in one recess provided in a containermade of a laminated ceramic or the like; and a configuration in whichtwo recesses are provided with a container body made of a laminatedceramic or the like, a crystal blank is hermetically encapsulated in onerecess to configure a crystal unit, and an IC chip is housed in theother recess. An example of a configuration of integrating crystal unit10 and IC chip 20 in this embodiment will be described later in detail.

As with the case shown in FIG. 1, IC chip 20 includes constant voltagecircuit 21, oscillator circuit 22, frequency controller 23, temperaturesensor 24, temperature compensating circuit 25, and nonvolatile memory26. In addition, IC chip 20 is provided with output buffers 31 and 32both including an inverting amplifier, as output buffers that amplify anoscillation output from oscillator circuit 22 and supply the amplifiedoutput as an analog signal to an external circuit. Output buffers 31 and32 are arranged in parallel with respect to an output from oscillatorcircuit 22. One of them, or output buffer 32, can be subjected to on/offcontrol of the output according to an external enable signal. Along withthe arrangement of these circuits in IC chip 20, IC chip 20 includes:power supply terminal VDD; ground terminal GND; a pair of crystalconnecting terminals X1 and X2 electrically connected with crystal unit10; input terminal AFC to which an automatic frequency control signal issupplied; enable terminal EN; and two output terminals OUT1 and OUT2 atwhich oscillation output signal from respective output buffers 31 and 32appear. The crystal connecting terminals, the power supply terminal, theground terminal, the input terminal, the enable terminal and the outputterminals in IC chip 20 are collectively referred to as IC terminals.

It is assumed that, in the crystal oscillator of the present embodiment,the plurally provided output buffers, which are two output buffers inthe example shown here, include an output buffer subjected to on/offcontrol of the output. The crystal oscillator is configured such thatvariation in amplitude of an oscillation output signal on the outputside of the output buffer due to on/off control does not adverselyaffect the oscillator circuit side as much as possible. It is consideredthat the adverse effect of variation in amplitude of the oscillationoutput signal back to the oscillator circuit side is caused by leakingof the oscillation output signal to the oscillator circuit side. Thus, aconfiguration of the present embodiment to prevent the oscillationoutput signal from being leaked back to the oscillator circuit side asmuch as possible will be described with reference to FIG. 3. A circuitdiagram shown in FIG. 3 indicates a part including crystal unit 10,oscillator circuit 22 and output buffers 31 and 32 in the crystaloscillator of the present embodiment, as a part enclosed by alternatelong and short dashed lines. A load circuit to be connected to thecrystal oscillator and a switch for generating the enable signal are notshown in FIG. 3.

Oscillator circuit 22 includes: inverting amplifier 51; feedbackresistor R1 of amplifier 51; two variable-capacitance diodes D1 and D2functioning as load capacitances; two resistors R2 and R3 for applyingcontrol voltage Vc to variable-capacitance diodes D1 and D2,respectively; and dc blocking capacitors C1 and C2. Feedback resistor R1is provided between an input terminal and an output terminal ofamplifier 51. Both ends of crystal unit 10 are connected to the inputand output terminals of amplifier 51 via crystal connecting terminals X1and X2, respectively. The input terminal of amplifier 51 is connected toone end of dc blocking capacitance C1. The other end of dc blockingcapacitance C1 is connected to one end of resistor R2 and the cathode ofvariable-capacitance diode D1. The output terminal of amplifier 51 isconnected to one end of dc blocking capacitance C2 and input terminalsof output buffers 31 and 32. The other end of dc blocking capacitance C2is connected to one end of resistor R3 and the cathode ofvariable-capacitance diode D2. Here, in the circuit shown in FIG. 2,control voltage Vc collectively indicates a frequency control signalsupplied from frequency controller 23 to oscillator circuit 22 and atemperature compensating signal supplied from temperature compensatingcircuit 25 to oscillator circuit 22. This voltage is supplied to theother ends of resistors R2 and R3 in common. The anodes ofvariable-capacitance diodes D1 and D2 are grounded.

In FIG. 3, output buffers 31 and 32 are indicated by circuit symbols ofinverting amplifiers. The output of output buffer 31 is connected to anexternal circuit. The output of output buffer 32 is also supplied to theexternal circuit via output terminal OUT2 of IC chip 20. A switch isprovided between enable terminal EN of IC chip 20 and a ground potentialpoint. An enable signal turns on and off, thereby allowing on/offcontrol of output buffer 32.

Leaking of the oscillation output signal back to the oscillator circuitside will be discussed. For connection from the oscillator circuit tocrystal unit 10, in the crystal oscillator, two wiring pathsrespectively extend from crystal connecting terminals X1 and X2 of ICchip 20 to crystal unit 10. Likewise, since the outputs from outputbuffers 31 and 32 are supplied to external circuits, the wiring pathsfor connection to the external circuits are connected to respectiveoutput terminals OUT1 and OUT2 from output buffers 31 and 32. In a caseof configuring the crystal oscillator by integrating a crystal blank asa crystal unit and IC chip 20 in the same container, the wiring pathsare formed in the container. For each output buffer, parasiticcapacitances C3 and C4 as indicated by broken lines in the diagram aregenerated between the two wiring paths connected to crystal connectingterminals X1 and X2 and the output side of the output buffer. Here, theoutput side of the output buffer means the output terminal of the outputbuffer and the wiring path connected to the output terminal. Parasiticcapacitance C3 is formed between the wiring path connected to crystalconnecting terminal X1 and the output side of the output buffer.Parasitic capacitance C4 is formed between the wiring path connected tocrystal connecting terminal X2 and the output side of the output buffer.The leaking of the oscillation output signal from the output side of theoutput buffer back to the oscillator circuit can be considered as aleakage of the oscillation output signal through the parasiticcapacitances C3 and C4.

As shown in FIG. 3, in the oscillator circuit employing invertingamplifier 51, the wiring path connected to crystal connecting terminalX1 and the wiring path connected to crystal connecting terminal X2 havephases opposite to each other with respect to a signal component of theoscillation frequency. Since, it has been assumed that an invertingamplifier is used as output buffer, relationship between the wiring pathconnected to crystal connecting terminal X2, that is, the input side ofthe output buffer, and the output side of the output buffer also havephases opposite to each other with respect to the signal component ofthe oscillation frequency. In general, the leakage of the oscillationoutput signal through the parasitic capacitance is small if the bothends of the parasitic capacitance have the same phase, and large ifthese ends have the opposite phases, according to relationship oftemporal change in potential difference between both ends of thecapacitance. In the case shown in FIG. 3, since the inverting amplifieris employed as the output buffer, the amount of leaking of theoscillation output signal via parasitic capacitance C4 is larger thanthe amount of leaking of the oscillation output signal via parasiticcapacitance C3. If the same amount of signal is leaked back to each ofthe input and output terminals of amplifier 51 of the oscillatorcircuit, the input terminal having higher impedance is more susceptibleto the adverse effect. However, the circuit shown in FIGS. 2 and 3 isnot susceptible to the oscillation output signal leaked back toamplifier 51 because the phase is identical to that of the signal at theinput terminal of amplifier 51. In conclusion, in order to suppress theadverse effect of variation in amplitude of the oscillation outputsignal due to on/off control of the output buffer, it is sufficient thatthe value of parasitic capacitance C4 for output buffer 32 on whichon/off control is performed is small.

Thus, the crystal oscillator according to the present embodimentspecifies that, since IC chip 20 is housed in or fixed to the container,the capacitance between the crystal connecting terminal of IC chip 20and the output terminal of IC chip 20 is defined as parasiticcapacitance generated between the crystal connecting terminal (or thewiring path connected to this crystal connecting terminal) and theoutput terminal (or another wiring path connected to this outputterminal). Attention is paid to output buffer 32, which is subjected toon/off control, of two output buffers 31 and 32; it is provided thatcapacitance between crystal connecting terminal X2 having a phaseopposite to that of the output from the output buffer 32 and outputterminal OUT2 connected to output buffer 32 is parasitic capacitance onthe opposite phase side, and capacitance between the other crystalconnecting terminal X1, that is, the crystal connecting terminal on thesame phase side, and output terminal OUT2 is parasitic capacitance onthe same phase side. The crystal oscillator of the present inventionallows the parasitic capacitance on the opposite phase side to besmaller than the parasitic capacitance on the same phase side. Inactuality, for instance, arrangement of the wiring paths and the groundpotential portion in the container enables the parasitic capacitance onthe opposite phase side to be smaller than the parasitic capacitance onthe same phase side.

In a strict sense, it is required to consider leaking due to parasiticcapacitance of wiring lines from the circuits in IC chip 20 to crystalconnecting terminals X1 and X2 and output terminals OUT1 and OUT2provided on the same main surface of IC chip 20. However, since thelengths of the wiring lines are much smaller than those of the wiringpaths provided on the container and connected to crystal connectingterminals X1 and X2 and output terminals OUT1 and OUT2, the effect ofthe leaking due to these wiring lines can be ignored.

FIGS. 4 and 5 shows an example of a configuration of a crystaloscillator in which the wiring path of the parasitic capacitance on theopposite phase side is smaller than the parasitic capacitance on thesame phase side. The crystal oscillator is configured as a surface mounttype suitable for surface mounting on a circuit board or a wiring board.The crystal oscillator includes container body 1, which has a shape of aflat and substantially rectangular parallelepiped. Recesses 1 a and 1 bare formed on respective main surfaces of container body 1. One recess 1a houses crystal blank 2, which corresponds to crystal unit 10 in thedescription on FIGS. 2 and 3. Recess 1 a is covered with lid member 5,thereby hermetically encapsulating crystal blank 2 in recess 1 a.Crystal blank 2 may be, for instance, a substantially rectangular AT-cutquartz crystal blank, and includes respective excitation electrodes, notshown, at both main surfaces. Leading electrodes extend from therespective excitation electrodes toward both sides of one end of crystalblank 2. The both sides of the one end of crystal blank 2, toward whichthe respective leading electrodes extend, are fixed to holding terminal3 provided on the bottom of one recess 1 a of container body 1 byconductive adhesive 4.

Mounting electrodes 9, which are used for surface-mounting the crystaloscillator on a circuit board or the like, are provided on the endsurface surrounding other recess 1 b of container body 1. In thisexample, as shown in FIG. 5, mounting electrodes 9 for power supply(VDD), ground (GND), input of AFC signal (AFC) and first oscillationoutput (OUT1) are formed at four corners of the end surface. Mountingelectrodes 9 for enable signal (EN) and second oscillation output (OUT2)are formed at central parts of the pair of long sides of container body1.

Aforementioned IC chip 20 is housed in other recess 1 b. In IC chip 20,the electronic circuit including the oscillator circuit is formed on onemain surface of a semiconductor substrate. Accordingly, this mainsurface is referred to as a circuit formation plane. The IC terminalsare provided on the circuit formation plane. Connection electrodes(i.e., pads) 6 are provided on the bottom surface of recess 1 bcorresponding to the respective IC terminals. IC chip 20 is fixed to thebottom surface of recess 1 b by flip-chip bonding using bumps 7. At thistime, the corresponding IC terminals and connection electrodes 6 areelectrically and mechanically connected to each other by bumps 7.Connection electrodes 6 corresponding to crystal connecting terminals X1and X2 among the IC terminals are electrically connected to holdingterminals 3 on the bottom surface of recess 1 a by conductive paths thatare formed in container body 1 and include via-holes 8. Crystal blank 2is thus electrically connected to the oscillator circuit and the like inIC chip 20. Connection electrode 6 corresponding to power supplyterminal VDD, ground terminal GND, output terminals OUT1 and OUT2, inputterminal AFC and enable terminal EN among the IC terminals are connectedto respective mounting electrodes 9 via conductive paths provided incontainer body 1.

In this embodiment, the magnitude of parasitic capacitance isconsidered. Therefore, the wiring path connected to the output terminalof IC chip 20 includes bump 7 electrically connected to the outputterminal, connection electrode 6, and mounting electrode 9, and theconductive path therebetween. Likewise, the wiring path connected to thecrystal connecting terminal of IC chip 20 includes bump 7 electricallyconnected to this crystal connecting terminal, connection electrode 6,holding terminal 3 and conductive adhesive 4, and a conductive path(including via-hole 8) therebetween. In the example shown in FIG. 5,what has a phase opposite to that of the output from output buffer 32subjected to on/off control is crystal connecting terminal X2. Thewiring path connected to crystal connecting terminal X2 includesconnection electrode 6 indicated by reference symbol X2 in FIG. 5 andvia-hole 8 connected thereto. The wiring path connected to the outputterminal of output buffer 32 subjected to on/off control includesconnection electrode 6 indicated by reference symbol OUT2 and mountingelectrode 9, and the conductive path connecting them. The wiring pathconnected to the other crystal connecting terminal X1 includesconnection electrode 6 indicated by reference symbol X1 in FIG. 5 andvia-hole 8 connected thereto.

In the example shown in FIG. 5, since connection electrode 6, which isto be ground potential GND, is arranged between connection electrode 6indicated by reference symbol X2 and connection electrode 6 indicated byreference symbol OUT2, the capacitance between output terminal OUT2 andcrystal connecting terminal X2 is smaller than the capacitance betweenoutput terminal OUT2 and crystal connecting terminal X1. This makeseffects of on/off control of the output from output buffer 32 difficultto be exerted on the side of oscillator circuit 22, and prevents theoscillation frequency from varying.

According to the example shown in FIG. 5, in container body 1,connection electrode 6 for grounding is disposed between connectionelectrode 6 for output terminal OUT2 and connection electrode 6 forcrystal connecting terminal X2. Thus, according to the configuration ofthe wiring path in the container, the capacitance between outputterminal OUT2 and crystal connecting terminal X2 having phases oppositeto each other is smaller than the capacitance between output terminalOUT2 and crystal connecting terminal X1 having a phase identical to eachother. However, leaking of the oscillation output signal from the outputside of the output buffer to the oscillator circuit can also besuppressed by arrangement of the IC terminals in the IC chip. The shapesand the like of the output terminals in IC chip 20 are not largelydifferent from each other among the respective output buffers. Also inthe container, the shapes of connection electrodes 6 are analogous toeach other. In consideration of capacitance between two wiring paths,contribution of a part where both wiring paths are close to each otheris large. Accordingly, in container body 1, what most contributes to thecapacitance between the output terminal and the crystal connectingterminal is a region where IC chip 20 is mounted on the container. Thefact that the region where the IC chip is mounted on the container mostcontributes to the capacitance is not limited to the case of the crystaloscillator where container body 1 shown in FIGS. 4 and 5 is used,crystal blank 2 is hermetically encapsulated in recess 1 a provided onone main surface of container body 1, and IC chip 20 is housed in recess1 b provided on the other main surface. Instead, the fact is entirelyapplicable to cases of general crystal oscillators integrating a crystalunit and an IC chip into a container or a package.

Accordingly, whatever the configuration of integrating crystal unit 10and IC chip 20 is, crystal connecting terminals X1 and X2 of IC chip 20can represent wiring paths connecting respective crystal connectingterminals X1 and X2 with crystal unit 10, and output terminals OUT1 andOUT2 of IC chip 20 can represent wiring paths connected to respectiveoutput terminals OUT1 and OUT2, thereby allowing the capacitance to beconsidered on the basis of the distance between thus represented wiringpaths. An example will hereinafter be described where setting of mutualarrangement between crystal connecting terminals X1 and X2 and outputterminals OUT1 and OUT in IC chip 20 suppresses that variation inamplitude of the oscillation output signal due to on/off control of theoutput buffer adversely affects the oscillator circuit.

In the crystal oscillator shown in FIG. 2, the output terminal of outputbuffer 32 of the output buffers 31 and 32 that is subjected to on/offcontrol according to the enable signal is disposed farther than theoutput terminal of output buffer 31 in relation to crystal connectingterminal X2. As a result, in comparison with a case where the outputbuffer subjected to the on/off control is disposed nearer than theoutput buffer not subjected to the on/off control in relation to crystalconnecting terminal X2, the side of oscillator circuit 22 becomesresistant to being affected by the on/off operation of the outputbuffer, allowing variation of the oscillation frequency to be prevented.

That is, according to the present embodiment, in the case where theplurality of output buffers of the inverting type are provided and someof them are on/off controllable output buffers, in relation to crystalconnecting terminal X2, which is the crystal connecting terminal havinga phase opposite to that of the output terminal of the output buffer,the output terminal of the on/off controllable output buffer is disposedfurther than the output terminal of the output buffer not to besubjected to on/off control. Even though the phase is identical to thatof the output from the output buffer, it is preferable to reduce theeffect of being leaked back to crystal connecting terminal X1.Accordingly, in this case, also in relation to crystal connectingterminal X1, it is preferable to satisfy a condition that the outputterminal of the on/off controllable output buffer is disposed fartherthan the output terminal of the output buffer not subjected to on/offcontrol.

In a case where a plurality of output buffers of the non-inverting typeare provided as the plurality of output buffers and some of them areused as on/off controllable output buffers, it is sufficient that theoutput terminal of the on/off controllable output buffer is disposedfarther than the output terminal of the output buffer not subjected toon/off control in relation to crystal connecting terminal X1, which is acrystal connecting terminal having a phase opposite to that of theoutput terminal of the output buffer. In this case, it is preferable tofurther satisfy a condition that the output terminal of the on/offcontrollable output buffer is disposed farther than the output terminalof the output buffer not subjected to on/off control also in relation tocrystal connecting terminal X2.

The crystal oscillator according to the present invention is not limitedto the case of adopting the non-inverting amplifier not subjected toon/off control and the on/off controllable inverting amplifier as outputbuffers provided in IC chip 20. Hereinafter, a crystal oscillatordifferent from FIG. 2 in presence or absence of on/off control of theoutput buffers and combination of inverting and non-inverting types willbe described.

In the configuration shown in FIG. 2, instead of output buffer 31 thatis not subjected to on/off control and includes inverting amplifier,output buffer 27 including a non-inverting amplifier can be employed asshown in FIG. 6. In the crystal oscillator shown in FIG. 6, outputbuffer 27 is not subjected to on/off control, and outputs an oscillationoutput signal to output terminal OUT1. In this configuration, inrelation to a crystal connecting terminal having a phase opposite tothat of the output from output buffer 32 subjected to on/off control,that is, in relation to crystal connecting terminal X2 in the case shownin FIG. 6, output terminal OUT2 of output buffer 32 subjected to on/offcontrol is disposed farther than output terminal OUT1 of output buffer27 not subjected to on/off control. Alternatively, wiring path areconfigured in a container such that the capacitance between outputterminal OUT2 and crystal connecting terminal X2 is smaller than thecapacitance between output terminal OUT2 and crystal connecting terminalX1. Such a configuration also allows variation in oscillation frequencyalong with on/off control of the output from the output buffer to besuppressed. This configuration includes output buffer 27 having thenon-inverting amplifier and output buffer 32 employing invertingamplifier. Oscillation output signals having phases opposite to eachother can be acquired.

A crystal oscillator shown in FIG. 7 has a configuration according tothat of the crystal oscillator shown in FIG. 2 where output buffer 31including the inverting amplifier not subjected to on/off control isreplaced with output buffer 28 including a non-inverting amplifiersubjected to on/off control. An oscillation output signal is suppliedfrom output buffer 28 to output terminal OUT1. In order to input anenable signal for on/off control of the output from output buffer 28,enable terminal EN for output buffer 28 is provided in IC chip 20.Output buffers 28 and 32 are capable of independent on/off control ofoutputs.

In this crystal oscillator, one of crystal connecting terminals X1 andX2 that has a phase opposite to that of the output of output buffer 28is crystal connecting terminal X1. What has a phase opposite to that ofthe output from output buffer 32 is crystal connecting terminal X2.Thus, the output terminal of output buffer 28 is disposed farther thanthe output terminal of the other output buffer, that is, output buffer32 in this case, in relation to crystal connecting terminal X1, theoutput terminal of output buffer 32 is disposed farther than the outputterminal of the other output buffer, that is, output buffer 28 in thiscase, in relation to crystal connecting terminal X2. Alternately, wiringpaths in the container is configured such that the capacitance betweenoutput terminal OUT1 of output buffer 28 and crystal connecting terminalX1 is smaller than the capacitance between output terminal OUT1 andcrystal connecting terminal X2, and the capacitance between outputterminal OUT2 of output buffer 32 and crystal connecting terminal X2 issmaller than the capacitance of output terminal OUT2 and crystalconnecting terminal X1. Accordingly, with respect to the wiring pathconnected to each crystal connecting terminal, the amount of leaking onthe output side of the output buffer having a phase opposite to that ofthe wiring path is reduced, allowing variation in oscillation frequencyalong with on/off control of the output buffer to be suppressed.

In the crystal oscillators according to the aforementioned respectiveembodiments of the present invention, as the output buffer whose outputcan be subjected to on/off control according to the enable signal, forinstance, a buffer that includes an analog switch circuit controlled bythe enable signal and is subjected to on/off control of the output of anoscillation output signal by means of on/off control of the analogswitch circuit, or a buffer where on/off control of power supply to theamplifier according to the enable signal in turn controls the output ofthe oscillation output signal, can be adopted.

What is claimed is:
 1. A crystal oscillator, comprising: a crystal unit;and an IC chip that integrates at least an oscillator circuit using saidcrystal unit, said crystal unit and said oscillator circuit being housedin a container, wherein said IC chip includes: a plurality of outputbuffers that amplify an output from said oscillator circuit and outputthe amplified output to outside; a pair of crystal connecting terminalsthat are used for electrical connection between said oscillator circuitand said crystal unit; and output terminals provided for said respectiveoutput buffers, signals of an oscillation frequency component appear atsaid pair of crystal connecting terminals with phases opposite to eachother, each of said plurality of output buffers independently includesan inverting or non-inverting amplifier, at least one of said pluralityof output buffers is an output buffer whose output is on/offcontrollable according to an enable signal, and said IC chip isconfigured such that, for each on/off controllable output buffer, inrelation to said crystal connecting terminal having a phase opposite tothat of the output of said each on/off controllable output buffer, anoutput terminal of said each on/off controllable output buffer isdisposed farther than an output terminal of the other output buffer. 2.The crystal oscillator according to claim 1, wherein the number of saidoutput buffers is two.
 3. The crystal oscillator according to claim 2,wherein said oscillator circuit includes an amplifier of an invertingtype, an input terminal and an output terminal of the amplifier of saidoscillator circuit are connected with said pair of crystal connectingterminals, respectively, and only one of said output buffers is on/offcontrollable output buffer.
 4. The crystal oscillator according to claim2, wherein said oscillator circuit includes an amplifier of an invertingtype, said pair of crystal connecting terminals include: a first crystalconnecting terminal connected to an input terminal of the amplifier ofsaid oscillator circuit and a second crystal connecting terminalconnected to an output terminal of the amplifier of said oscillatorcircuit, a first output buffer of said two output buffers is an outputbuffer that includes the non-inverting amplifier and is on/offcontrollable, a second output buffer is an output buffer that includesthe inverting amplifier and is on/off controllable, and an outputterminal of said first output buffer is disposed farther than an outputterminal of said second output buffer in relation to said first crystalconnecting terminal, and the output terminal of said second outputbuffer is disposed farther than the output terminal of said first outputbuffer in relation to said second crystal connecting terminal.
 5. Thecrystal oscillator according to claim 1, wherein the on/off control isperformed by controlling a power supply of said on/off controllableoutput buffer according to the enable signal.
 6. The crystal oscillatoraccording to claim 1, said on/off controllable output buffer includes ananalog switch controlled by the enable signal and performs the on/offcontrol by the analog switch.
 7. A crystal oscillator, comprising: acrystal unit; and an IC chip that integrates at least an oscillatorcircuit using said crystal unit, said crystal unit and said oscillatorcircuit being housed in a container, wherein said IC chip includes: twooutput buffers comprising a first output buffer and a second outputbuffer that amplify an output from said oscillator circuit and outputthe amplified output to outside; a first crystal connecting terminal anda second crystal connecting terminal that are used for electricalconnection between said oscillator circuit and said crystal unit; afirst output terminal and a second output terminal that are provided forsaid first output buffer and said second output buffer, respectively;and an enable terminal to which an enable signal is applied, each ofsaid first output buffer and said second output buffer independentlyincludes an inverting or non-inverting amplifier, signals of anoscillation frequency component appear at said first crystal connectingterminal and said second crystal connecting terminal with phasesopposite to each other, a phase at an output of said second outputbuffer being opposite to a phase at said second crystal connectingterminal, said second output buffer is an output buffer whose output ison/off controllable according to an enable signal, and said IC chip isconfigured such that a distance from said second crystal connectingterminal to said second output terminal is larger than a distance fromsaid second crystal connecting terminal to said first output terminal.8. The crystal oscillator according to claim 7, wherein said firstcrystal connecting terminal, said second crystal connecting terminal,said first output terminal and said second output terminal are providedon a surface of a semiconductor substrate which constitutes said ICchip.
 9. The crystal oscillator according to claim 8, wherein a firstdistance from said first output terminal to a terminal which is fartherone of said first crystal connecting terminal and said second crystalconnecting terminal from said first output terminal is larger than asecond distance from said second output terminal to a terminal which isnearer one of said first crystal connecting terminal and said secondcrystal connecting terminal from said second output terminal.
 10. Thecrystal oscillator according to claim 9, further comprising a ground ICterminal for grounding said IC chip, said ground IC terminal beingprovided on said surface of said semiconductor substrate, wherein saidground le terminal is arranged at a position between said terminal whichis said nearer one and said second output terminal.